@article{oai:miyazaki-u.repo.nii.ac.jp:00002965,
 author = {黒木, 伸一 and 松本, 寛樹 and Kuroki, Shinichi and Matumoto, Hiroki},
 journal = {宮崎大学工学部紀要, Memoirs of Faculty of Engineering, University of Miyazaki},
 month = {Jul},
 note = {In this study, a capacitance ratio-reduced and unity gain buffer-based switched-capacitor integrator using three phase clocks is presented. Principle of operation is described and is also confirmed on SIMetrix. The purpose of this proposal circuit is to decrease the capacitor ratio of the SC integrator, and to improve the maximum frequency that can operate. Very large capacitance ratio is derived.},
 pages = {111--113},
 title = {3相クロックを用いた容量比低減型単一利得増幅器構成SC積分器},
 volume = {40},
 year = {2011},
 yomi = {クロキ, シンイチ and マツモト, ヒロキ}
}