{"created":"2023-05-15T09:58:50.509417+00:00","id":2877,"links":{},"metadata":{"_buckets":{"deposit":"9fb20bde-d5a5-45d6-a69e-86b44280ed47"},"_deposit":{"created_by":5,"id":"2877","owner":"5","owners":[5],"pid":{"revision_id":0,"type":"depid","value":"2877"},"status":"published"},"_oai":{"id":"oai:miyazaki-u.repo.nii.ac.jp:00002877","sets":["73","73:36","73:36:330","73:36:330:322"]},"author_link":["14881","11928","15190"],"item_10002_alternative_title_1":{"attribute_name":"その他（別言語等）のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"ジョウイ ビット カラ ヘンカン スル ヨウリョウヒ ニ ドンカン ナ SC ジュンカンガタ D/A ヘンカンキ"}]},"item_10002_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2012-07-30","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"68","bibliographicPageStart":"65","bibliographicVolumeNumber":"41","bibliographic_titles":[{"bibliographic_title":"宮崎大学工学部紀要","bibliographic_titleLang":"ja"},{"bibliographic_title":"Memoirs of Faculty of Engineering, University of Miyazaki","bibliographic_titleLang":"en"}]}]},"item_10002_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"In this study, capacitance mismatch insensitive switched-capacitor algorithmic DAC from MSB is presented. Principle of operation is described and is also confirmed on SIMetris. This converter can operate exactly and thus is more accuracte than presious converters.","subitem_description_language":"en","subitem_description_type":"Abstract"}]},"item_10002_publisher_8":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"宮崎大学工学部","subitem_publisher_language":"ja"},{"subitem_publisher":"Faculty of Engineering, University of Miyazaki","subitem_publisher_language":"en"}]},"item_10002_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA00732558","subitem_source_identifier_type":"NCID"}]},"item_10002_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"05404924","subitem_source_identifier_type":"ISSN"}]},"item_10002_version_type_20":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"甲斐, 康平","creatorNameLang":"ja"},{"creatorName":"カイ, コウヘイ","creatorNameLang":"ja-Kana"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"松本, 寛樹","creatorNameLang":"ja"},{"creatorName":"マツモト, ヒロキ","creatorNameLang":"ja-Kana"},{"creatorName":"Matsumoto, Hiroki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"Kai, Kouhei","creatorNameLang":"en"}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-06-21"}],"displaytype":"detail","filename":"engineering41_65-68.pdf","filesize":[{"value":"696.9 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"engineering41_65-68.pdf","url":"https://miyazaki-u.repo.nii.ac.jp/record/2877/files/engineering41_65-68.pdf"},"version_id":"1ce4a237-7fef-4f00-9c47-310c1cfe4d9b"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"D/A Convertor, Capacitance ratio","subitem_subject_language":"en","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"departmental bulletin paper","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"上位ビットから変換する容量比に鈍感なSC循環型D/A変換器","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"上位ビットから変換する容量比に鈍感なSC循環型D/A変換器","subitem_title_language":"ja"},{"subitem_title":"Capacitance Ratio-insensitive of Switched-Capacitor Algorithmic Digital-to-Analog Converter from Most Significant Bit","subitem_title_language":"en"}]},"item_type_id":"10002","owner":"5","path":["73","36","330","322"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2012-10-26"},"publish_date":"2012-10-26","publish_status":"0","recid":"2877","relation_version_is_last":true,"title":["上位ビットから変換する容量比に鈍感なSC循環型D/A変換器"],"weko_creator_id":"5","weko_shared_id":2},"updated":"2023-07-30T00:11:51.963658+00:00"}