{"created":"2023-05-15T09:58:40.603371+00:00","id":2672,"links":{},"metadata":{"_buckets":{"deposit":"7db1b9ea-3ea7-474d-a080-890bb238f60e"},"_deposit":{"created_by":5,"id":"2672","owner":"5","owners":[5],"pid":{"revision_id":0,"type":"depid","value":"2672"},"status":"published"},"_oai":{"id":"oai:miyazaki-u.repo.nii.ac.jp:00002672","sets":["73","73:36","73:36:330","73:36:330:318"]},"author_link":["11928","13905"],"item_10002_alternative_title_1":{"attribute_name":"その他（別言語等）のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"テイデンアツ スイッチド キャパシタ セキブンキ ト ソノ オウヨウ","subitem_alternative_title_language":"ja-Kana"}]},"item_10002_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2008-08-30","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"120","bibliographicPageStart":"115","bibliographicVolumeNumber":"37","bibliographic_titles":[{"bibliographic_title":"宮崎大学工学部紀要","bibliographic_titleLang":"ja"},{"bibliographic_title":"Memoirs of Faculty of Engineering, University of Miyazaki","bibliographic_titleLang":"en"}]}]},"item_10002_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Switched capacitor(SC) technique is actively studied. It enables the decrease of the chip area and power consumption. The SC circuit is composed of the switch, capacitor, and opamp. Forwarding and the accumulation of the charge are done by periodic opening and shutting of the switch.\n Making on small chip area and the low voltage of the integrated circuit are needed as the accumulation technology advances. There are various problems depending on the low voltage. For example, the operation of floating switch, offset and gain error, and spike. The problems of foating switch is solved by using unity gain reset(UGR) technique. Other problems are solved by circuit structure.\n In this paper, low voltage UGR-SC integrator and offset and gain error-compensated low voltage UGR-SC integrator are proposed. A sigma-delta-modulator is proposed as an application of SC integrator. The proposed circuits operate using simple non-overlapping two or three phase clocks. Performance are verified by simulations on PSpice.","subitem_description_language":"en","subitem_description_type":"Abstract"}]},"item_10002_publisher_8":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"宮崎大学工学部","subitem_publisher_language":"ja"},{"subitem_publisher":"Faculty of Engineering, University of Miyazaki","subitem_publisher_language":"en"}]},"item_10002_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA00732558","subitem_source_identifier_type":"NCID"}]},"item_10002_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"05404924","subitem_source_identifier_type":"ISSN"}]},"item_10002_version_type_20":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"井上, 順平","creatorNameLang":"ja"},{"creatorName":"イノウエ, ジュンペイ","creatorNameLang":"ja-Kana"},{"creatorName":"Inoue, Junpei","creatorNameLang":"en"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{}]},{"creatorNames":[{"creatorName":"松本, 寛樹"},{"creatorName":"マツモト, ヒロキ","creatorNameLang":"ja-Kana"},{"creatorName":"Matsumoto, Hiroki","creatorNameLang":"en"}],"nameIdentifiers":[{}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"井上, 順平","creatorNameLang":"ja"},{"creatorName":"イノウエ, ジュンペイ","creatorNameLang":"ja-Kana"},{"creatorName":"Inoue, Junpei","creatorNameLang":"en"}],"familyNames":[{},{},{}],"givenNames":[{},{},{}],"nameIdentifiers":[{}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-06-21"}],"displaytype":"detail","filename":"KJ00005015925.pdf","filesize":[{"value":"340.2 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"KJ00005015925.pdf","url":"https://miyazaki-u.repo.nii.ac.jp/record/2672/files/KJ00005015925.pdf"},"version_id":"abd68a69-656d-4cce-ada5-a3274992d81f"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"Switched-Capacitor (SC), Unity Gain Reset (UGR), Low-Voltage, Integrator, Sigma-Delta-Modulator","subitem_subject_language":"en","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"departmental bulletin paper","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"低電圧スイッチドキャパシタ積分器とその応用","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"低電圧スイッチドキャパシタ積分器とその応用","subitem_title_language":"ja"},{"subitem_title":"Low-Voltage Switched-Capacitor lntegrators and their Application","subitem_title_language":"en"}]},"item_type_id":"10002","owner":"5","path":["73","36","330","318"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2008-11-11"},"publish_date":"2008-11-11","publish_status":"0","recid":"2672","relation_version_is_last":true,"title":["低電圧スイッチドキャパシタ積分器とその応用"],"weko_creator_id":"5","weko_shared_id":2},"updated":"2023-11-28T00:26:14.288934+00:00"}