@article{oai:miyazaki-u.repo.nii.ac.jp:00002596,
 author = {熊谷, 寛夫 and 谷川, 寛幸 and Tanigawa, Hiroyuki and 淡野, 公一 and Tanno, Koichi and 石塚, 興彦 and Kumagai, Hiroo and 谷川, 寛幸 and Tanigawa, Hiroyuki and Ishizuka, Okihiko},
 journal = {宮崎大学工学部紀要, Memoirs of Faculty of Engineering, University of Miyazaki},
 month = {Jul},
 note = {Abstract 
In recent years, the world of wireless communications has been changing very rapidly. The wireless 
communication devices need RF analog circuits such as mixer. In CMOS technology, if it successfully merges 
RF analog and baseband digital blocks, it is possible to reduce size, weight,cost, and power consumption. 
However, the circuit elements which can be operated under low supply voltage are required because of 
lowering of the breakdown voltage with the development of fabrication technique in CMOS process. 
In this paper, a low-supply-voltage and wide-bandwidth CMOS analog multiplier is proposed, which is 
indispensable for mixer. The proposed multiplier has advantages of low voltage operation and low noise. 
Simulations of the multiplier demonstrate the input range of 0.54 Vp-p, the -3 dB bandwidth of 1.03 GHz 
and the S/N ratio of 131 dB with VDD=2 V. Next, the proposed multiplier is applied to a downconversion 
mixer. The mixer can be operated at VDD=2V, and the conversion gain and 3rd order intcrcept point (IIP3) 
are -O.8 dR and +10.9 dBm, respectively.},
 pages = {183--190},
 title = {低電源電圧・広帯域CMOSアナログ乗算器の設計と2.4GHz RFダウンコンバージョンミキサへの応用},
 volume = {32},
 year = {2003},
 yomi = {クマガイ, ヒロオ and タニガワ, ヒロユキ and タンノ, コウイチ and イシズカ, オキヒコ and タニガワ, ヒロユキ}
}