{"created":"2023-05-15T09:58:26.929369+00:00","id":2406,"links":{},"metadata":{"_buckets":{"deposit":"5cb2b7e6-92b3-4bf7-ac0e-8f70d976bcb5"},"_deposit":{"created_by":5,"id":"2406","owner":"5","owners":[5],"pid":{"revision_id":0,"type":"depid","value":"2406"},"status":"published"},"_oai":{"id":"oai:miyazaki-u.repo.nii.ac.jp:00002406","sets":["73","73:36","73:36:330","73:36:330:315"]},"author_link":["12077","7152","12078","15924","12081"],"item_10002_alternative_title_1":{"attribute_name":"その他（別言語等）のタイトル","attribute_value_mlt":[{"subitem_alternative_title":"コウセイノウ サンプル ホールド カイロ ト ソノ オウヨウ","subitem_alternative_title_language":"ja-Kana"}]},"item_10002_biblio_info_7":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2005-08","bibliographicIssueDateType":"Issued"},"bibliographicPageEnd":"134","bibliographicPageStart":"127","bibliographicVolumeNumber":"34","bibliographic_titles":[{"bibliographic_title":"宮崎大学工学部紀要","bibliographic_titleLang":"ja"},{"bibliographic_title":"Memoirs of Faculty of Engineering, University of Miyazaki","bibliographic_titleLang":"en"}]}]},"item_10002_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Recently, various portable devices become smaller and smaller, so that the mixed digital and analog LSI is\ndesired to integrate them on a chip. The data converter is an important circuit to realize the mixed digital\nand analog LSI. The data converter need the conversion time for the quantization and the encode. Therefore,\nsample and hold (S/H) circuits are necessary to maintain a part of analog information temporarily. However,\nMOS switches cannot be deeply turned on because enough overdrive voltage cannot be supplied to gates of\nMOS switches under the low-voltage condition.\nIn this dissertation, the CMOS S/H circuit with the clock boost technique and the input signal tracking\ntechnique is proposed. As the results, the proposed circuit reduces the effect of charge injection and feedthrough\nwith maintaining low-voltage, low-distortion and rail-to-rail operation. Next, as an application of the proposed\nS/H circuit, ΔΣ deta converter is designed. The circuits proposed in this dissertation are evaluated through\nStar-HSPICE simulations.","subitem_description_language":"en","subitem_description_type":"Abstract"}]},"item_10002_publisher_8":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"宮崎大学工学部","subitem_publisher_language":"ja"},{"subitem_publisher":"Faculty of Engineering, University of Miyazaki","subitem_publisher_language":"en"}]},"item_10002_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA00732558","subitem_source_identifier_type":"NCID"}]},"item_10002_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"05404924","subitem_source_identifier_type":"ISSN"}]},"item_10002_version_type_20":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"佐藤, 公信","creatorNameLang":"ja"},{"creatorName":"サトウ, キミノブ","creatorNameLang":"ja-Kana"},{"creatorName":"Sato, Kiminobu","creatorNameLang":"en"}],"familyNames":[{"familyName":"佐藤","familyNameLang":"ja"},{"familyName":"サトウ","familyNameLang":"ja-Kana"},{"familyName":"Sato","familyNameLang":"en"}],"givenNames":[{"givenName":"公信","givenNameLang":"ja"},{"givenName":"キミノブ","givenNameLang":"ja-Kana"},{"givenName":"Kiminobu","givenNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"15924","nameIdentifierScheme":"WEKO"}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"0000000106573887","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"https://isni.org/isni/0000000106573887"}],"affiliationNames":[{"affiliationName":"宮崎大学","affiliationNameLang":"ja"},{"affiliationName":"University of Miyazaki","affiliationNameLang":"en"}]}],"creatorNames":[{"creatorName":"淡野, 公一","creatorNameLang":"ja"},{"creatorName":"タンノ, コウイチ","creatorNameLang":"ja-Kana"},{"creatorName":"Tanno, Koichi","creatorNameLang":"en"}],"familyNames":[{"familyName":"淡野","familyNameLang":"ja"},{"familyName":"タンノ","familyNameLang":"ja-Kana"},{"familyName":"Tanno","familyNameLang":"en"}],"givenNames":[{"givenName":"公一","givenNameLang":"ja"},{"givenName":"コウイチ","givenNameLang":"ja-Kana"},{"givenName":"Koichi","givenNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"7152","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"50260740","nameIdentifierScheme":"e-Rad_Researcher","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=50260740"}]},{"creatorNames":[{"creatorName":"石塚, 興彦","creatorNameLang":"ja"},{"creatorName":"イシズカ, オキヒコ","creatorNameLang":"ja-Kana"}],"nameIdentifiers":[{"nameIdentifier":"12077","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"外山, 貴子","creatorNameLang":"ja"},{"creatorName":"トヤマ, タカコ","creatorNameLang":"ja-Kana"},{"creatorName":"Toyama, Takako","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"12078","nameIdentifierScheme":"WEKO"}]},{"creatorAffiliations":[{"affiliationNameIdentifiers":[{"affiliationNameIdentifier":"","affiliationNameIdentifierScheme":"ISNI","affiliationNameIdentifierURI":"http://www.isni.org/isni/"}],"affiliationNames":[{"affiliationName":"","affiliationNameLang":"ja"}]}],"creatorNames":[{"creatorName":"佐藤, 公信","creatorNameLang":"ja"},{"creatorName":"サトウ, キミノブ","creatorNameLang":"ja-Kana"},{"creatorName":"Sato, Kiminobu","creatorNameLang":"en"}],"familyNames":[{"familyName":"佐藤","familyNameLang":"ja"},{"familyName":"サトウ","familyNameLang":"ja-Kana"},{"familyName":"Sato","familyNameLang":"en"}],"givenNames":[{"givenName":"公信","givenNameLang":"ja"},{"givenName":"キミノブ","givenNameLang":"ja-Kana"},{"givenName":"Kiminobu","givenNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"15924","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Ishizuka, Okihiko","creatorNameLang":"en"}],"nameIdentifiers":[{"nameIdentifier":"12081","nameIdentifierScheme":"WEKO"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-06-21"}],"displaytype":"detail","filename":"KJ00003579369.pdf","filesize":[{"value":"1.0 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"KJ00003579369.pdf","url":"https://miyazaki-u.repo.nii.ac.jp/record/2406/files/KJ00003579369.pdf"},"version_id":"95ac846f-ed0c-44f7-a78a-16e3b95ace11"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"Sample and hold circuits, Boost circuits, Dummy switch, Hold error, Sigma-delta converters","subitem_subject_language":"en","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"jpn"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"departmental bulletin paper","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"高性能サンプル・ホールド回路とその応用","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"高性能サンプル・ホールド回路とその応用","subitem_title_language":"ja"},{"subitem_title":"A High Performance CMOS Sample and Hold Circuit and its Application","subitem_title_language":"en"}]},"item_type_id":"10002","owner":"5","path":["73","36","330","315"],"pubdate":{"attribute_name":"PubDate","attribute_value":"2007-06-28"},"publish_date":"2007-06-28","publish_status":"0","recid":"2406","relation_version_is_last":true,"title":["高性能サンプル・ホールド回路とその応用"],"weko_creator_id":"5","weko_shared_id":2},"updated":"2024-12-26T07:33:51.401886+00:00"}