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サンプル・ホールド回路の高性能化に関する研究
http://hdl.handle.net/10458/840
http://hdl.handle.net/10458/8403574640e-8ead-4a06-8102-fc638d16da20
名前 / ファイル | ライセンス | アクション |
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KJ00004682870.pdf (1.2 MB)
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Item type | 紀要論文 / Departmental Bulletin Paper(1) | |||||
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公開日 | 2007-10-30 | |||||
タイトル | ||||||
言語 | ja | |||||
タイトル | サンプル・ホールド回路の高性能化に関する研究 | |||||
タイトル | ||||||
言語 | en | |||||
タイトル | Research for High-Performance Sample-and-Hold Circuits | |||||
言語 | ||||||
言語 | jpn | |||||
キーワード | ||||||
言語 | en | |||||
主題Scheme | Other | |||||
主題 | Sample and hold circuits, Mirror Hold Capacitor Circuit, Boost Tracking Clock Generator, high-speed | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | departmental bulletin paper | |||||
その他(別言語等)のタイトル | ||||||
その他のタイトル | サンプル ・ ホールド カイロ ノ コウセイノウカ ニ カンスル ケンキュウ | |||||
言語 | ja-Kana | |||||
著者 |
桑原, 健介
× 桑原, 健介× 淡野, 公一× 田村, 宏樹× 外山, 貴子× 桑原, 健介 |
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抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | In our laboratory, Boost Tracking Clock Generator (BTCG) and Mirror Hold Capacitor Circuit (MHCC) have been proposed. However, the improvement of the performance by using the combined these techniques has not been reported yet. Moreover, BTCG was unsuitable for high-speed sample and hold (S/H) circuits because of the circuit composition. In order to improve the delay time of BTCG, four kind of high-speed circuits are proposed. The proposed circuits are evaluated through Star-HSPICEsimulation. As the results, the effectiveness of the proposed circuits can be confirmed. | |||||
言語 | en | |||||
書誌情報 |
ja : 宮崎大学工学部紀要 en : Memoirs of Faculty of Engineering, University of Miyazaki 巻 36, p. 81-87, 発行日 2007-08-30 |
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出版者 | ||||||
言語 | ja | |||||
出版者 | 宮崎大学工学部 | |||||
出版者 | ||||||
言語 | en | |||||
出版者 | Faculty of Engineering, University of Miyazaki | |||||
ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 05404924 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AA00732558 | |||||
著者版フラグ | ||||||
出版タイプ | VoR | |||||
出版タイプResource | http://purl.org/coar/version/c_970fb48d4fbd8a85 |